Brevetti
- 1) Battaglia A, Fallica PG, Ronsisvalle C, Coffa S, Raineri V,
" Apparatus for the localized reduction of the lifetime of charge carriers, particularly in integrated elctronic devices ",
US patent no. 5,900,652 (Tue, 04/05/1999)
- 2) Campisano SU, Lombardo S, Ferla G, Polman A, Van Den Hoven GN,
"Electro-luminescent material, solid state electro-luminescent device and process for fabrication thereof",
US patent no. 5,667,905 (Tue, 16/09/1997)
An electro-luminescent material and solid state electro-luminescent device comprising a mixed material layer formed of a mixture of silicon and silicon oxide doped with rare earth ions so as to show intense room-temperature photo- and electro-luminescence is described. The luminescence is due to internal transitions of the rare earth ions. The mixed material layer has an oxygen content ranging from 1 to 65 atomic % and is produced by vapor deposition and rare earth ions implant. A separated implant with elements of the V or III column of the periodic table of elements gives rise to a PN junction. The so obtained structure is then subjected to thermal treatment in the range 400-1100 °C.
- 3) Campisano SU, Raineri V,
"Method and apparatus for forming buried oxide layers within silicon wafers",
US patent no. 5,723,372 (Tue, 03/03/1998)
A method and apparatus for forming buried oxide layers within silicon wafers comprising several steps. Recesses are formed in a silicon wafer. Light ions are implanted in the silicon wafer at a depth that is smaller than the depth of the recesses to form bubbles of the light ions in the silicon wafer. The light ions are evaporated from the silicon wafer to leave cavities in the place of the bubbles. The cavities are oxidized through the recesses to form a buried layer of silicon oxide
- 4) Caruso D, Raineri V, Saggio M, Stagnitti U,
"Method for manufacturing electronic devices in semiconductor substrates provided with gettering sites",
US patent no. 6,451,672 B1 (Tue, 17/09/2002)
This invention relates to a method for manufacturing electronic devices integrated monolithically in a semiconductor substrate delimited by two opposed front and back surfaces of a semiconductor material wafer. The method comprises at least a step of implanting ions of a noble gas, followed by a thermal treatment directed to form gettering microvoids in the semiconductor by evaporation of the gas. The ion implanting step is carried out through the back surface of the semiconductor wafer prior to starting the manufacturing process for the electronic devices, and also can be before the step of cleaning the front surface of the wafer.
- 5) Coffa S, Libertino S, Frisina F,
"High-gain photodetector with separated PN junction and rare earth doped region and a method of forming the same",
US patent no. 6,943,390 B2 (Mon, 10/10/2011)
The high-gain photodetector is formed in a semiconductor-material body which houses a PN junction and a sensitive region that is doped with rare earths, for example erbium. The PN junction forms an acceleration and gain region separate from the sensitive region. The PN junction is reverse-biased and generates an extensive depletion region accommodating the sensitive region. Thereby, the incident photon having a frequency equal to the absorption frequency of the used rare earth crosses the PN junction, which is transparent to light, can be captured by an erbium ion in the sensitive region, so as to generate a primary electron, which is accelerated towards the PN junction by the electric field present, and can, in turn, generate secondary electrons by impact, according to an avalanche process. Thereby, a single photon can give rise to a cascade of electrons, thus considerably increasing detection efficiency.
- 6) Coffa S, Libertino S, Saggio M, Frisina F,
"Semiconductor device for electro-optic applications, method for manifacturing said device and corresponding semiconductor laser device",
US patent no. 6,828,598 B1 (Tue, 07/12/2004)
A semiconductor device for electro-optic applications includes a rare-earth ions doped P/N junction integrated on a semiconductor substrate. The semiconductor device may be used to obtain laser action in silicon. The rare-earth ions are in a depletion layer of the doped P/N junction, and are for providing a coherent light source cooperating with a waveguide defined by the doped P/N junction. The doped P/N junction may be the base-collector region of a bipolar transistor, and is reverse biased so that the rare-earth ions provide the coherent light.
- 7) Coppola G, De Nicola S, Ferraro P, Finizio A, Grilli S, Javidi B, Pierattini G,
"Holographic method with numerical reconstruction for obtaining an image of a three-dimensional object in which even points out of the depth of field are in focus, and holographic apparatus using such a method",
US patent no. 7,221,490 B2 (Tue, 22/05/2007)
A holographic method with numerical reconstruction for obtaining an image of a three-dimensional object, employs a digitalized hologram of an object or of a portion thereof, and includes starting from the digitalized hologram, extracting a phase image of the object corresponding to a matrix MD of distance values, selecting a subassembly SD of the distance value assembly present in matrix MD, subassembly SD containing distance values dk, extracting from matrix MD an iso-level assembly IQdk of corresponding bidimensional coordinate of the object; reconstructing, for each distance value dk, a bidimensional matrix IMdk of intensity values relevant to the object; extracting, from each bidimensional matrix IMdk, a bidimensional IFdk of intensity values; and starting from the intensity values, reconstructing the three-dimensional intensity image of the object.
- 8) Coppola G, Ferraro P, Iodice M, De Nicola S,
"Interferometric system for the simultaneous measurement of the index of refraction and of the thickness of transparent materials, and related procedure",
US patent no. 7,046,373 B2 (Tue, 16/05/2006)
Interferometric system for the simultaneous measurement of the index of refraction and of the thickness of transparent materials with a single measurement operation. The system employs an interferometer as a “shear interferometer” with the advantage of varying the wavelength of the luminous source. The index of refraction and the thickness are determined in two phases. Firstly it is determined the optical path analyzing the displacement of interferometric signal obtained by orthogonal incidence; successively, by means of phase recovery techniques and the previously determined optical path value, it is possible to obtain the index of refraction of the material. From the knowledge of the index and of the optical path it is obtained the material thickness.
- 9) D'Arrigo G, Coffa S, Spinella C,
"Micro silicon fuel cell, method of fabrication and self-powered semiconductor device integrating a micro fuel cell",
US patent no. 6,969,664 B2 (Tue, 29/11/2005)
A fuel cell for an electrical load circuit includes a first monocrystalline silicon substrate and a positive half-cell formed therein, and a second monocrystalline silicon substrate and a positive half-cell formed therein. Each half-cell includes a microporous catalytic electrode permeable to a gas and connectable to the electrical load circuit. A cell area is defined on a surface of each respective monocrystalline silicon substrate, and includes a plurality of parallel trenches formed therein for receiving the gas to be fed to the respective microporous catalytic electrode. A cation exchange membrane separates the two microporous catalytic electrodes. Each half-cell includes a passageway for feeding the respective gas to the corresponding microporous catalytic electrode.
- 10) D'Arrigo G, Spinella C,
"Semiconductor device having a suspended micro-system",
US patent no. 7,777,285 B2 (Tue, 17/08/2010)
A method is provided for fabricating a semiconductor device that includes a suspended micro-system. According to the method, a silicon porous layer is formed above a silicon substrate, and the silicon porous layer is oxidized. An oxide layer is deposited, and a first polysilicon layer is deposited above the oxide layer. The first polysilicon layer, the oxide layer, and the silicon porous layer are selectively removed. A nitride layer is deposited, and a second polysilicon layer is deposited. The second polysilicon layer, the nitride layer, the first polysilicon layer, and the oxide layer are selectively removed. The silicon porous layer is removed in areas made accessible by the previous step. Also provided is a semiconductor device that includes a suspended structure fixed to at least two walls through a plurality of hinges, with the suspended structure including an oxide layer, a first polysilicon layer, a nitride layer, and a second polysilicon layer.
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