"Graphene on SiC wafers for high performant RF transistors" (GRAPHIC-RF), EUROCORES Program "EuroGRAPHENE" funded by the European Science Foundation, WEB Site 
This CRP focuses on transport properties of Graphene and its possible application in integrated electronics. In particular, the possibility to grow high quality a few layers of graphene on SiC will be investigated considering different politypes (4H, 3C), the C and Si face, and different crystal orientations on large diameter wafers (up to 150 mm). The transport properties will be measured and compared with graphene flakes obtained by others methods such as exfoliation and chemical synthesis with the final aim to investigate on the role of defects and interfaces in the transport properties. Both structural (HRTEM, LEEM, ARPA), optical (Raman) and electrical measurements (on test patters) will be used and compared. The activity will take advantage by the development and implementation of novel nanocharacterisation methods based on scanning probe microscopy able to determine locally (in the mesoscopic limit) transport properties. A multiscale approach to simulate the transport properties will be developed considering either atomistic models as well as semi-empirical continuum models. The possibility to fabricated devices for high speed (frequency) electronics will be investigated, too, considering switching, rectifiers and passive components all based on graphene.
Within the previous European projects FRENDTECH and ATOMICS with major contributions by the current proposers, process simulation has been brought to a state which allows in industrial environments a sufficiently accurate simulation of doping profiles in advanced CMOS technologies. Important electrical characteristics of core CMOS devices can now be predicted from scratch or with a minimum calibration effort. However, concepts towards low-power electronics, smart power applications, CMOS image sensors, and CMOS derivatives providing extra functionalities are still not sufficiently supported by TCAD. This concerns especially the prediction of leakage currents in such or parasitic devices caused by electrically active defects that remain after processing, and alternative doping techniques like plasma immersion ion implantation, low-temperature implantation, diversified cocktail implants and laser annealing which are considered for low-leakage ultra shallow junctions. The lack of suitable models that can be used in the early stages of industrial R&D inhibits the necessary cost reduction in the development of devices for which Europe is still at the forefront. Funded within the ICT theme of the Seventh Framework Programme of the EC, our project will develop the full set of missing models and implement and include them into the Sentaurus TCAD platform of Synopsys so that they are of immediate value to the European semiconductor industry. The integrated models will finally be evaluated by STMicroelectronics with respect to industrial needs. To reach these ambitious goals, a consortium of European companies active in complementary fields of competence (STMicroelectronics: device manufacturing, Synopsys: TCAD software, Exico, IBS: equipment production, Probion, Semilab: characterization) and leading European research institutes (CNRS-LAAS/CEMES, CNR-IMM, ETH-Zurich, Fraunhofer-IISB, Univ. Newcastle) has been formed which, together, is well prepared to expertly cover all fields from experiment via characterization and modelling to simulation.
Maintaining cost decrease per function, reducing cycle times, improving reproducibility and equipment effectiveness while reducing the environmental impact of the factories are key challenges to be addressed to keep the competitiveness of European SC manufacturers. anufacturing Science is the main enabler that will allow overcoming these challenges.
IMPROVE aims to enhance European semiconductor fabs efficiency by providing methods and tools to better control the process variability, reduce the cycle time and enhance the effectiveness of the production equipment.
IMPROVE will focus on 3 major development axes: i) tThe development of Virtual Metrology (VM) techniques allowing the control of the process at wafer level whilst suppressing standard metrology steps; ii) the development of Predictive Maintenance (PM) techniques to improve the process tools reliability whilst optimizing the maintenance frequency and increasing the equipment uptime; iii) the development of Adaptive Control Plan (ACP) concepts, suppressing unnecessary measurements steps whilst dynamically improving the control plan efficiency.
For these 3 topics, models will be developed and assessed for different process steps and equipment platforms in different manufacturing lines leading to the development of generic solutions. The impact of the integration of the developed techniques in the various line decision systems and IT infrastructure will also be evaluated and assessed. To that end, a strong consortium of industrialists, SMEs, academia and institutes has been made-up, including the major European actors in the area of semiconductor manufacturing.
The proposal aims to make EU independent from other developed countries on wide band gap semiconductors high quality material, equipment and advanced processing. This field is of strategic importance since it involves the development of high efficient systems (of high revenue) for applications whenever an electric power is needed: from telecommunication to automotive, from consumer electronics to electrical household appliances, from industrial applications to home automation.
In particular, the consortium will develop an European technology including equipments (growth, processing and characterization), processing (growth and device fabrication) and characterization (methods and equipments) till some of the possible applications. The know how will be developed taking advantage of the presence of the most advanced public research centres and reference Universities operating on SiC and GaN technologies , large companies world leaders and many SME from 6 EU countries. 150mm 4H-SiC wafers of high quality are target establishing EU beyond the world wide state of the art, to date at 100mm wafers. Also GaN heteroepitaxy on 150mm Si wafers is considered.
COSMIC will advance the state of the art of complementary organic circuits, i.e. circuits combining n-type and p-type organic thin film transistors (OTFTs). The project comprises extensive research on technology, circuit design, OTFT modelling and characterization. The technology effort includes material and printing processes co-development (incl. LC polymers) and focuses on large area and highly productive in-line compatible processes. COSMIC's research will strongly contribute to advancement of the scientific knowledge in organic electronics. The use of complementary transistors will enable major breakthroughs in performance and application potential of OTFT circuits. Complementary digital circuits show a dramatically improved noise margin, allowing higher complexity and yield compared to p-type-only circuits. They can work at lower supply voltage (often below 10V) resulting in reduced power consumption and better integration potential between silicon and organic electronics. High complexity will enable many new applications for organic digital circuits. In COSMIC we selected two specific logic applications as demonstrators: a display line driver and an ALU. The availability of complementary devices will also enable the design of analogue circuits using OTFTs, a basically unexplored field at the moment. In COSMIC an analogue to digital converter coupled to a temperature sensor will be demonstrated, showing for the first time the potential of OTFTs in the sensors and actuator market. A silent authentication tag comprising a first organic RF receiver will also be build, to show organic electronics’ potential in the field of item-level, secure tracking of goods using realistic protocols. All COSMIC applications are of direct relevance to the industrial partners within the consortium and demonstrate the capability of organic complementary technology to generate value for the European industry at large.
