Silicon-On-Insulator (SOI) wafers with device layer thickness in the range 2-25 µm are employed for the fabrication of physical sensors for strain, pressure and temperature. The fabrication technology of the various devices is in most cases based on surface micromachining of the SOI device layer, which is used to fabricate the structural elements of the devices, exploiting the Buried Oxide of the wafers as a sacrificial layer. Moreover, wafer-level vacuum packaging of the devices on the SOI substrates is adopted to obtain strain sensors based on flexural resonators in vacuum and absolute pressure sensors base on capacitive and piezoresistive transduction.  All these sensors have been validated in laboratory tests (TRL 4). For some of them, industrial research and technology transfer activities are ongoing.Silicon-On-Insulator (SOI) wafers with device layer thickness in the range 2-25 µm are employed for the fabrication of physical sensors for strain, pressure and temperature. The fabrication technology of the various devices is in most cases based on surface micromachining of the SOI device layer, which is used to fabricate the structural elements of the devices, exploiting the Buried Oxide of the wafers as a sacrificial layer. Moreover, wafer-level vacuum packaging of the devices on the SOI substrates is adopted to obtain strain sensors based on flexural resonators in vacuum and absolute pressure sensors base on capacitive and piezoresistive transduction.  All these sensors have been validated in laboratory tests (TRL 4). For some of them, industrial research and technology transfer activities are ongoing.

Contact person: Alberto Roncaglia