One of the most popular implementation of the ink ejection system employed in inkjet printers relies on an electro-thermal mechanism which is implemented with a heating resistance connected in series to a current driver, operating as a switch. Often, nMOS interdigital planar structures are chosen for a low-cost implementation of the power transistors, whose fundamental parameter with regard to the application is the on-resistance. This work introduces an experimental and theoretical investigation of the on-resistance of nMOS interdigital power drivers, with particular concern about its dependence on the device geometry and on process parameters such as contact and interconnect resistances.