The study of the behaviour of the cell of emerging memories (such as PCMs and ReRAMs) is fundamental to optimize materials, cell architecture, and programming pulses and algorithms as well as to monitor the actual cell performance. Since the final state of the above memory cells is dependent on the applied programming pulse shape, a buffer able to feed the cell with adequate electrical pulses is needed. In this paper, we propose a buffer targeted at this application, which is able to reproduce fast pulses (time duration of 50 ns and rise and fall times down to 15 ns) and drive up to 2 mW into a 10 kΩ load, while keeping the input-to-output voltage error below 0.4%.
29 May 2013
IC Design & Technology (ICICDT), 2013 International Conference on