Type:
Conference
Description:
Two-transistor zero-VGS amplifiers made with polysilicon source-gated transistors achieve voltage gain approaching 300 (49dB). TCAD simulations reveal the effect of load and driver transistor geometry on gain and operating frequency. The SGT circuits have simultaneously superior gain and reduced layout area (two-transistor, channel length L = 3μm and width W = 10 and 30μm), relative to conventional TFT implementations. These results recommend low-complexity, compact SGT designs for flexible and printed amplifiers, such as bio- and chemical sensors.
Publisher:
IEEE
Publication date:
23 Sep 2019
Biblio References:
Pages: 114-117
Origin:
ESSDERC 2019-49th European Solid-State Device Research Conference (ESSDERC)