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This letter reports on initial investigation results on the material quality and device suitability of a homo-epitaxial 3C-SiC growth process. AFM surface investigations revealed RMS surface roughness levels of 163.21nm, which was shown to be caused by pits (35 μm width and 450 nm depth) with a density of 1.09 x 105 cm-2 which had formed during material growth. On bigger scan areas, the formation of these were seen to be caused by step bunching, revealing the need for further epitaxial process improvement. XRD analysis showed good average crystalline qualities with a FWHM of 160 arcsonds for the 3C-SiC (002) being lower than for the 3C-on-Si material (210 arcseconds). The analysis of C-V curves then revealed similar interface-trapped charge levels for freestanding 3C-SiC, 3C-SiC on Si and 4H-SiC, with FG post-deposition annealed freestanding 3C-SiC devices showing DIT levels of 3.3 x 1011 cm-2 eV …
IOP Publishing
Publication date: 
17 Mar 2021

Arne Benjamin Renz, Fan Li, Oliver Vavasour, Peter Gammon, Tianxiang Dai, Guy William Clarke Baker, Francesco La Via, Marcin Zielinski, Luyang Zhang, Nicholas Grant, John Murphy, Philip A Mawby, Mike Jennings, Vishal Ajit Shah

Biblio References: 
Semiconductor Science and Technology