In this paper we review the processes of wearout and breakdown (BD) of the gate dielectrics of interest for microelectronics, in particular silicon oxides or oxynitrides in the thickness range of tens of nm down to about 1 nm. We also discuss some preliminary results on the kinetics of dielectric degradation in the case of MOS structures on 4H SiC, a critical material for the realization of new generations of power MOS devices. We review the kinetics of oxide degradation under high voltage stress and the statistics of the time to BD. We then focus on experimental studies concerning the kinetics of the final event of BD, during which the gate leakage increases above acceptable levels. We describe the current understanding concerning the dependence of the BD current transient on the oxide thickness and the electric field and voltage. In particular, we discuss the progressive BD phenomenon, ie, a gradual growth of the BD …