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Tri-gate FinFlash devices are one of the most promising solutions to solve scaling problems of Flash memories. The use of Silicon Nanocrystal storage nodes in novel 3D FinFET architecture offers the possibility of scaled gate dielectrics (implying scaled operating voltages), along with short channel effect immunity and higher sensing current drivability. In this paper, we investigate the channel length and fin width impacts (with dimensions down to 30 nm and 10 nm, respectively) on Si-NC SOI FinFlash operating in the NAND scheme. Devices with narrow fin widths show a Fowler-Nordheim (FN) write boost, while the channel length scaling strongly reduces the programming window. The obtained results are deeply explained through fully three dimensional TCAD simulations.
Publication date: 
26 Aug 2007

L Perniola, J Razafindramora, E Nowak, P Scheiblin, C Jahan, M Gely, C Vizioz, F Allain, S Lombardo, C Bongiorno, G Reimbold, F Boulanger, B De Salvo, S Deleonibus

Biblio References: 
Pages: 42-43
2007 22nd IEEE Non-Volatile Semiconductor Memory Workshop