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Studying the electrical and structural properties of the interface of the gate oxide (SiO 2) with silicon carbide (4H-SiC) is a fundamental topic, with important implications for understanding and optimising the performances of metal-oxide-semiconductor field effect transistor (MOSFETs). In this paper, near interface oxide traps (NIOTs) in lateral 4H-SiC MOSFETs were investigated combining transient gate capacitance measurements (C–t) and state of the art scanning transmission electron microscopy in electron energy loss spectroscopy (STEM-EELS) with sub-nm resolution. The C–t measurements as a function of temperature indicated that the effective NIOTs discharge time is temperature independent and electrons from NIOTs are emitted toward the semiconductor via-tunnelling. The NIOTs discharge time was modelled also taking into account the interface state density in a tunnelling relaxation model and it allowed …
IOP Publishing
Publication date: 
18 Jul 2018

Patrick Fiorenza, Ferdinando Iucolano, Giuseppe Nicotra, Corrado Bongiorno, Ioannis Deretzis, Antonino La Magna, Filippo Giannazzo, Mario Saggio, Corrado Spinella, Fabrizio Roccaforte

Biblio References: 
Volume: 29 Issue: 39 Pages: 395702