We present a temperature-dependence electrical characterization of the oxide/semiconductor interface in MOS capacitors with a SiO 2 layer deposited on 4H-SiC using dichlorosilane and nitrogen-based vapor precursors. The post deposition annealing process in N 2 O allowed to achieve an interface state density D it 9.0× 10 11 cm-2 eV-1 below the conduction band edge. At room temperature, an electron barrier height (conduction band offset) of 2.8 eV was measured using the standard Fowler-Nordheim tunneling model. The electron conduction through the SiO 2 insulating layer was evaluated by studying the experimental temperature dependence of the gate current. In particular, the Fowler-Nordheim electron barrier height showed a negative temperature coefficient (dφ B/dT=-0.98 meV/C), which is very close to the expected value for an ideal SiO 2/4H-SiC system. This result, obtained for deposited SiO 2 …