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Due to their intrinsically high carrier mobility, Ge and IIIV semiconductors have gained an increasing consideration as active channels for p-type and n-type post-Si metal oxide semiconductor (MOS) devices [1]. In particular, among III-V compounds, InxGa1-xAs with x ranging from 0.15 to 0.53 may offer a good balance between low electron effective mass, high saturation velocity, and low intervalley scattering. However, integration of gate dielectrics with high permittivity poses severe concerns on the electrical quality of the interface on both kinds of semiconductors because large density of active traps can jeopardize a satisfactory field modulation in the MOS structure and then cause several drawbacks in the final device such as mobility degradation or unwanted threshold voltage shift. Therefore, the physical identification and a proper passivation of interface traps in Ge and III-V compounds are demanded issues. An …
IOP Publishing
Publication date: 
1 Aug 2011

Alessandro Molle, Silvia Baldovino, Luca Lamagna, Sabina Spiga, Marco Fanciulli, Dimitra Tsoutsou, Evangelos Golias, Athanasios Dimoulas, Guy Brammertz, Clement Merckling, Matty Caymax

Biblio References: 
Issue: 27 Pages: 1899
ECS Meeting Abstracts