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Due to the high carrier mobility, Ge and III-V semiconductors are attractive as active channels for post-Si metal oxide semiconductor (MOS) devices. However, integration of gate dielectrics on high-mobility substrates is frequently jeopardized by the electrical activity of traps nearby the interface. Active traps determination at the interface between the two semiconductors with gate dielectrics has been conducted with the aim to validate several electrical passivation methodologies. In particular, GeO2 and LaGeOx passivations of Ge are investigated by conjugating magnetic resonance spectroscopy and electrical response of the MOS capacitors. The case of In0. 53Ga0. 47As is addressed by tailoring the surface treatments and the growth parameters in the trimethyaluminum based atomic layer desposition of Al2O3 films. The electrical quality of the Al2O3/In0. 53Ga0. 47As interface is assessed by exploring the …
IOP Publishing
Publication date: 
4 Oct 2011

Alessandro Molle, Silvia Baldovino, Luca Lamagna, Sabina Spiga, Alessio Lamperti, Marco Fanciulli, Dimitra Tsoutsou, Evangelos Golias, Athanasios Dimoulas, Guy Brammertz, Clement Merckling, Matty Caymax

Biblio References: 
Volume: 41 Issue: 3 Pages: 203
ECS Transactions