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This paper reports a comparative characterization of SiO 2/SiC interfaces subjected to post-oxide-deposition annealing in N 2 O or POCl 3. Annealing process of the gate oxide in POCl 3 allowed to achieve a notable increase of the MOSFET channel mobility (up to 108 cm 2 V-1 s-1) with respect to the N 2 O annealing (about 20 cm 2 V-1 s-1), accompanied by a different temperature behaviour of the electrical parameters in the two cases. Structural and compositional analyses revealed a different surface morphology of the oxide treated in POCl 3, as a consequence of the strong incorporation of phosphorous inside the SiO 2 matrix during annealing. This latter explained the instability of the electrical behaviour of MOS capacitors annealed in POCl 3.
Trans Tech Publications Ltd
Publication date: 
1 Jan 2014

Patrick Fiorenza, Lukas K Swanson, Marilena Vivona, Filippo Giannazzo, Corrado Bongiorno, Simona Lorenti, Alessia Frazzetto, Fabrizio Roccaforte

Biblio References: 
Volume: 778 Pages: 623-626
Materials Science Forum