Education. 

PhD in Mathematical Models and Methods in Engineering (from 11/2019), Politecnico di Milano, Milano. Project: "Modelling of Memristive Devices for Bio-inspired Computing".

MSc in Electronics Engineering (12/2016), Politecnico di Milano, Milano. 

Master Thesis: "Modelling and Simulation of Charge-Trap Memories". 

Abstract: "The thesis addresses the mathematical and numerical modelling of charge-trap (CT) memory cells.   These devices appear as a promising evolution of the classical planar floating-gate technology by keeping Flash storage solutions aligned with Moore’s Law. The main novelty of the thesis consists of the introduction of a physically based mathematical and computational model of a CT memory using a multiscale approach. The method is based on the description of carrier tunneling on a one-dimensional (1D) manifold that is immersed in two-dimensional (2D) and three-dimensional (3D) geometrical representations of the memory cell. The adoption of the multiscale formulation significantly reduces the computational effort without compromising the physical reliability of the scheme. Model and its numerical finite element approximation are validated through the extensive study of test and realistic device structures in planar and cylindrical configurations. Simulation results agree favorably with experimental data and physical intuition."

Work Experiences.

Continuous and coordinated contractual relationships based on the project : "Modeling of Tunneling and Charging Dynamics" (01/2017 - 08/2017), Politecnico di Milano, Dipartimento di Matematica. 

Abstract: "The continuous scaling in the semiconductor nonvolatile memory market is pushing the planar Flash NAND technology near its physical limits. The most promising alternatives to the planar technology appear to be today the charge-trap concept and the three-dimensional paradigm. In this report we present a 2D mathematical and computational model for tunneling calculations and electron and hole dynamics description in an amorphous layer of a charge trap memory cell. The model allows to deal with either planar or cylindrical 3D memory structures due to the fact that is formulated in both cartesian and radial coordinates. The tunneling model takes advantage of a multiscale approach, consisting in a 1D calculation of tunneling currents along the electric field streamlines in the device. The charge dynamics in the trapping layer is modeled by means of a coupling between a trapping ODE system and a charge transport PDE system. The mathematical formulation and the numerical implementation of the model are discussed."